1. Field of the Invention
This invention relates to a bus control method for information processing apparatuses, and particularly to a control method for a bus provided with an internal switch in a controller of a complex apparatus implemented with LSI.
2. Related Background Art
Conventionally, in the case of that a controller of a complex apparatus is realized with LSI, modules, such as bus masters including various CPUs and bus slaves, exist in the system to access memory, ROM and other IO devices. Each bus master often performs access to a plurality of slaves to execute processing.
Each master module in the system, therefore, must access a plurality of slave modules. To realize this, a control method, in which a crossbar switch is used to switch connection from a master to a slave, is adopted.
Conventionally, if a master accesses a slave, a switch is connected to begin a transaction, and then the switch is released from the master after completion of one transaction.
However, if a master, i.e., CPU issues a read transaction to a slow processing device, such as an IO device, and issues a write transaction to another device, a switch is released after receiving a data return of the read transaction and then the write transaction is issued to the next device. Therefore, the master cannot issue a next transaction until access to a transaction is completed, and also the slave cannot receive the next transaction until the current transaction is completed.